1. Field of the Invention
The present invention relates to stacked capacitor structures of semiconductor devices. In particular, the present invention relates to semiconductor device structures which include aluminum plugs disposed between the active device regions and bit lines thereof. More specifically, the present invention relates to semiconductor device structures which include an aluminum-filled trench that electrically connects a bit line to an active device region positioned between adjacent stacked capacitor structures.
2. Background of Related Art
Stacked capacitors are employed in many state of the art semiconductor devices to maintain high storage capacitance despite the ever-increasing densities of such semiconductor devices. Stacked capacitors typically make an electrical connection with a diffusion region, or active device region, of a semiconductor substrate, such as silicon, polysilicon, gallium arsenide, or indium phosphide. Some conventional processes for fabricating stacked capacitors on semiconductor device structures facilitate increased densities by employing electrically conductive layers (e.g., polysilicon layers) that are somewhat convoluted or have large surface areas, and which project outwardly relative to and electrically contact their associated active device regions. The remainders of the capacitor structures are then fabricated on the electrically conductive layers.
Many stacked capacitor structures include electrically conductive contacts between the active device regions and the bit lines thereof. Typically, such electrically conductive contacts are fabricated from polysilicon, which withstands the high temperature processes (e.g., thermal oxidation processes or thermal anneal processes) that are usually performed subsequent to the fabrication of contacts on semiconductor device structures. Such contacts, however, may create a somewhat undesirable amount of contact resistance during operation of the semiconductor device.
Metals have also been employed as the contact material between the active device region and bit lines of semiconductor devices and through the stacked capacitor structures thereof. Again, due to the high process temperatures that are employed following the fabrication of the contacts, metals that will withstand high process temperatures are typically employed in the contacts. Metals that will withstand such high process temperatures are commonly referred to as "refractory metals" and include titanium (Ti), tungsten (W), molybdenum (Mo), and tantalum (Ta). While these metals and their silicides have low resistivities relative to other metals, their resistivities (.rho..sub.Ti =43-47 .mu..OMEGA.-cm, .rho..sub.W =5.3 .mu..OMEGA.-cm, .rho..sub.Mo =5 .mu..OMEGA.-cm, .rho..sub.Ta =13-16 .mu..OMEGA.-cm) may be somewhat undesirable during the operation of state of the art very large scale integration (VLSI) and ultra large scale integration (ULSI) semiconductor devices. As metals of higher resistivity are employed in such semiconductor devices, the power requirements and operating temperature of such semiconductor devices increase undesirably.
Conventionally, aluminum (Al) has been widely employed as an electrically conductive material in semiconductor devices, as it has low resistivity (.rho..sub.A1 =2.7 .mu..OMEGA.-cm) and is compatible with both silicon (Si) and silicon dioxide (SiO.sub.2). Aluminum is not, however, typically employed in self-aligned processes due to its inability to withstand high temperature processing, such as the rapid thermal anneal processes that may be employed in fabricating self-aligned silicide layers.
What is needed is a process for fabricating a stacked capacitor structure on a semiconductor device structure which increases the speed of the semiconductor device and reduces the interconnect resistance and power consumption thereof and a stacked capacitor and semiconductor device structure fabricated by such a process.